1. Field of Invention
The invention relates to a method of improving the testability rate of electronic component and, in particular, to a method of increasing the IC testability rate by providing the position information of test points.
2. Related Art
Currently, most of the circuit board manufacturers decide test points before finishing the blueprint, which is then transferred to continue subsequent tasks. However, in the flowchart of current circuit board designs, the design engineers determine the test points based upon the ICT test pad list and the testability report of the design for manufacturability (DFM), but there is no priority in the test points. The considerations are purely based upon the circuit board area, the layout factors, and the blueprint arrangement, with as many test pads as possible.
In accord with the current procedure, even though the testability rate can be increased as high as possible, the allocation of the test pads may be inconsistent with the test requirements in the end. Therefore, the testability rate will not increase in proportion. In view of the limited circuit board area, the value of the position of each test point should be increased too. This is something that the current procedure cannot achieve.
Since the conventional electronic component test method cannot increase its testability rate, how to design a new electronic component test method with a higher testability rate is an important object of the manufacturers.